Build #31 (Oct 20, 2010 12:29:19 AM)

1. atomic add, sub, xor of 32bit variables don't need to use compare/exchange loop
   (not enabled, not tested, odds of working slim, but
   it is in the right direction) (detail)
2. go back from IsTypeDoubleInt to IsType64 (detail)
3. rename TypeIs64 to TypeIsDoubleInt
   many other "64" remain however
   and I doubt we'll retarget this to AMD64 or any other architecture
     more likely to generate C
   
   In gcc parlance, SI is single int, 32bits, DI is double int, 64bits
   however here that's not what I mean, but rather an integer
   that uses two registers.
   
   It is tempting to call it just "double", but that means
   double precision floating point. (detail)
4. just some whitespace changes (detail)
5. back to bt/bts/btr/btc instructions for set_member, set_singleton
   They are not in fact slow/atomic, I was mislead by a comment
   in gcc/config/i386/i386.md and I thought other finds on the Internet. (detail)

Started by upstream project cm3-current-build-PPC_DARWIN build number 144